Array substrate, liquid crystal display panel and display apparatus

ABSTRACT

An array substrate includes a plurality of gate lines and a plurality of data lines arranged to cross each other, a plurality of pixel electrodes disposed within areas defined by the gate lines and the data lines, and shielding electrodes provided over the gate lines, wherein the shielding electrodes cover at least edge portions of the gate lines close to the pixel electrodes; at least every three pixel electrodes constitute a pixel unit, and at least one pixel electrode in each pixel unit has a length substantially in an extension direction of the gate lines larger than a length thereof substantially in an extension direction of the data lines; the respective pixel electrodes constituting the same pixel unit are connected with different data lines correspondingly; and there are two data lines in a gap between every two adjacent pixel units.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims the benefit of Chinese Patent Application No.201610994341.4 filed on Nov. 11, 2016 in the State Intellectual PropertyOffice of China, the whole disclosure of which is incorporated herein byreference.

TECHNICAL FIELD

Embodiments of the present disclosure relate to the field of displaytechnology, and in particular to an array substrate, a liquid crystaldisplay (LCD) panel and a display apparatus.

BACKGROUND

In an LCD panel of advanced super dimension switch (ADS) type, anelectric field generated at edges of slit electrodes arranged in thesame plane and an electric field generated between a slit electrodelayer and a plate electrode layer form a multidimensional electric fieldsuch that liquid crystal molecules in all orientations between the slitelectrodes and right over the electrodes in a liquid crystal cell can berotated to improve efficiency of liquid crystal and increase lighttransmittance.

However, when an ADS type LCD panel is compressed forcefully, anopposing substrate disposed above an array substrate is displaced. If ablack matrix over a gate line is not wide enough, light leakage easilyoccurs from a side of the gate line, resulting a poor quality of imagesin the LCD panel. In prior art systems, typically a shielding electrodeis used to shield an electric field above a gate line, such that even ifthe LCD panel including the array substrate is displaced under effect ofan external force, the deflection of the liquid crystal molecules willnot be affected and thus light leakage around the gate lines can beeliminated.

On the other hand, in order to avoid light leakage at a data line,typically a black matrix disposed over the data line and covering thedata line is made to have a larger width. As a result, although thewidth of the black matrix over a gate line is reduced by using ashielding electrode, the actual effect of increasing aperture ratio ofthe LCD panel is limited, and the actual effect of increasingutilization efficiency of liquid crystal is also limited.

For the above reasons, there is still a need to further improve apertureratio and transmittance of an LCD panel while satisfying gate lineshielding.

SUMMARY

According to one aspect of embodiments of the present disclosure, thereis provided an array substrate, including a plurality of gate lines anda plurality of data lines arranged to cross each other, a plurality ofpixel electrodes disposed within areas defined by the plurality of gatelines and the plurality of data lines, and shielding electrodes disposedabove the gate lines, wherein the shielding electrodes cover at leastedge portions of the gate lines close to the pixel electrodes,respectively; at least every three pixel electrodes constitute a pixelunit, and at least one pixel electrode in each pixel unit has a lengthin an extension direction of the gate lines larger than a length thereofin an extension direction of the data lines; the respective pixelelectrodes constituting the same pixel unit are connected with differentdata lines correspondingly; and there are two data lines provided in agap between every two adjacent pixel units.

In a possible embodiment, the shielding electrodes completely cover thegate lines, respectively.

In a possible embodiment, the shielding electrodes only cover the edgeportions of the gate lines, respectively.

In a possible embodiment, the shielding electrodes and the pixelelectrodes are disposed in the same layer and insulated from each other.

In a possible embodiment, the shielding electrodes and the pixelelectrodes are disposed in the same layer and insulated from each other.

In a possible embodiment, in each pixel unit, there is at least onegroup of pixel electrodes consisting of two pixel electrodes arranged inthe extension direction of the data lines.

In a possible embodiment, each of the two pixel electrodes arranged inthe extension direction of the data lines has a length in the extensiondirection of the gate lines larger than a length thereof in theextension direction of the data lines.

In a possible embodiment, every three pixel electrodes constitute apixel unit having a rectangular shape, in which two of the every threepixel electrodes are arranged in the extension direction of the datalines, while the remaining one of the every three pixel electrodes andthe two of the every three pixel electrodes are arranged in theextension direction of the gate lines.

In a possible embodiment, every four pixel electrodes constitute a pixelunit having a rectangular shape, in which two groups of pixel electrodesare arranged substantially in the extension direction of the gate lines,with each group consisting of two pixel electrodes arrangedsubstantially in the extension direction of the date lines.

In a possible embodiment, the array substrate further includes a blackmatrix layer disposed over the data lines and the gate lines, wherein awidth of a pattern of the black matrix layer over each data line andcovering the data line is greater than a width of the data line.

Another aspect of embodiments of the present disclosure provides aliquid crystal display panel including the array substrate according tothe abovementioned embodiments of the disclosure, an opposing substrateopposite to the array substrate, and a black matrix layer provided on aside of the opposing substrate facing the array substrate or on a sideof the array substrate facing the opposing substrate, wherein a width ofa pattern of the black matrix layer over each data line and covering thedata line is greater than a width of the data line.

A yet another aspect of embodiments of the present disclosure provides adisplay apparatus including the liquid crystal display panel accordingto the abovementioned embodiments of the present disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other features of the present disclosure will become moreapparent by describing in detail exemplary embodiments thereof withreference to the accompanying drawings, in which:

FIG. 1a is a schematic structural view of an array substrate accordingto an embodiment of the present disclosure;

FIG. 1b is a schematic structural view of an array substrate accordingto another embodiment of the present disclosure;

FIG. 1c is a schematic structural view of an array substrate accordingto yet another embodiment of the present disclosure;

FIG. 1d is a schematic structural view of an array substrate accordingto further embodiment of the present disclosure;

FIG. 2 is a schematic structural view of an array substrate according toan embodiment of the present disclosure, showing positions ofdisclinations; and

FIG. 3 is a schematic structural view of a black matrix covering datalines in an array substrate according to an embodiment of the presentdisclosure.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Embodiments of the present disclosure will be described hereinafter indetail with reference to the attached drawings, wherein the likereference numerals refer to the like elements. The present disclosuremay, however, be embodied in many different forms and should not beconstrued as being limited to the embodiment set forth herein; rather,these embodiments are provided so that the present disclosure will bethorough and complete, and will fully convey the concept of thedisclosure to those skilled in the art.

Hereinafter, an array substrate, a liquid crystal display (LCD) paneland a display apparatus according to embodiments of the presentdisclosure will be described in detail with reference to theaccompanying drawings.

As shown in FIG. 1a or 1 b, an embodiment of the disclosure provides anarray substrate including a plurality of gate lines 01 and a pluralityof data lines 02 crossing each other, a plurality of pixel electrodesdisposed in areas defined by the plurality of gate lines 01 and theplurality of data lines 02, and shielding electrodes 03 disposed overthe gate lines 01, respectively. The shielding electrodes 03 at leastcover edge portions of the gate lines 01 close to the pixel electrodes,such as pixel electrodes A, B or C in FIG. 1c , or pixel electrodes A′,B′, C′ or D′ in FIG. 1d , respectively. At least every three pixelelectrodes constitute a pixel unit, and at least one pixel electrode ineach pixel unit has a length substantially in an extension direction ofthe gate lines 01, which is larger than a length of the at least onepixel electrode substantially in an extension direction of the datelines 02. The respective pixel electrodes of each pixel unit areconnected with different data lines 02 correspondingly. There are twodata lines 02 provided in a gap between every two pixel units adjacentto each other.

With the array substrate according to the embodiment of the disclosure,an area of a black matrix for covering data lines in each pixel unit isgreatly reduced and the aperture ratio is increased without reducing thenumber of the data lines and the gate lines by improving the structureof the data lines by providing two data lines in a gap between every twopixel units adjacent each other. Further, an area of a black matrixcovering the gate lines is reduced by shielding the gate lines. The twofactors function together to greatly increase the aperture ratio of theLCD panel, and in turn greatly improve the quality of picture of the LCDpanel.

In order to realize shielding of the gate lines 01 by the shieldingelectrodes 03, there are two implementations for the array substrateaccording to embodiments of the disclosure.

As shown in FIG. 1b , the shielding electrodes 03 simply cover edgeportions of the gate lines 01 close to the pixel electrodes,respectively.

Alternatively, as shown in FIG. 1b , the shielding electrodes 03completely cover the gate lines 01, respectively.

The shielding electrodes 03 simply cover edge portions of the gate lines01 close to the pixel electrodes, respectively. This means that theorthogonal projections of the shielding electrodes 03 on the substratesimply overlap the edges of the orthogonal projections of the gate lines01 on the substrate, respectively. A length of the overlapped portion inan extension direction of the data lines 02 may be in the range of 3um-5 um, or other values, which is not limited herein.

Note that in a structure of an LCD panel consisting of an arraysubstrate and an opposing substrate, for an LCD panel of ADS type, acommon electrode layer is disposed on a side of the array substrate;while for an LCD panel of TN type or VA type, a common electrode layeris disposed on a side of the opposing substrate. In order to apply acommon electrode signal to the shielding electrode 03 so as to shieldthe gate lines 01, the array substrate of embodiments of the presentdisclosure is only adapted to an LCD panel of ADS type, in which theshielding electrodes 03 may be disposed in the same layer as the pixelelectrodes and insulated from the pixel electrodes to avoid interferencewith the signal of the pixel electrodes.

In an array substrate according to a specific embodiment of thedisclosure, the structure of the pixel unit may be improved by thefollowing manner.

In each pixel unit, there is at least one group of pixel electrodes thatinclude two pixel electrodes arranged substantially in an extensiondirection of the data lines 02.

In order to avoid defects caused because the pixel electrode isdistanced from the data line 02 or the gate line 01 around it withdifferent spaces, the spaces between each pixel electrode and thesurrounding data lines or gate lines are always kept the same.

For example, as shown in FIG. 1c , in each pixel unit 04, there may beone group of pixel electrodes that include two pixel electrodes arrangedsubstantially along the extension direction of the date lines 02, suchas the pixel electrode A and the pixel electrode B.

As another example, as shown in FIG. 1d , in each pixel unit 05, theremay be two groups of pixel electrodes that each include two pixelelectrodes arranged substantially along the extension direction of thedate lines 02, such as the pixel electrode A′, the pixel electrode B′,the pixel electrode C′, and the pixel electrode D′, which is not limitedherein.

Taking the structure shown in FIG. 1c as an example and using theschematic view of FIG. 2 showing the positions of disclinationscorresponding to the structure of FIG. 1c , the utilization factor ofliquid crystals in the structure can be calculated as below:

The disclination ratio X_(A) of the pixel electrode A satisfies:X _(A) =a/2+a/2+c.

The disclination ratio X_(B) of the pixel electrode B satisfies:X _(B) =a/2+a/2+c.

The disclination ratio X_(C) of the pixel electrode C satisfies:X _(C) =a+a+b.

Where, the characters a, b, and c refer to the disclination ratios oftheir respective positions, and the disclination ratio at b position ismuch larger than the disclination ratio at c position. From the resultof the calculation, it can be known that the general disclination ratioin each pixel unit is X_(A)+X_(B)+X_(C), since c<b, there is:X_(A)=X_(B)<X_(C).

In contrast, in the prior art in which each pixel unit consists of threepixel electrodes C arranged horizontally or vertically, the generaldisclination ratio in each pixel unit is 3X_(C). Thus, as a result ofcomparison with the structure of the pixel unit in an array substrateaccording to embodiments of the present disclosure, the disclinationratio can be effectively reduced and the utilization factor of liquidcrystals can be improved, and thus the transmittance of the LCD panelcan be improved.

Further, in an array substrate according to an embodiment of thedisclosure, as shown in FIG. 1c , the two pixel electrodes A and Barranged substantially along the extension direction of the data lines02 each have a length substantially in an extension direction of thegate lines 01 larger than a length thereof substantially in an extensiondirection of the data lines 02.

Specifically, in FIG. 1c , the data lines 02 are arranged vertically ona base substrate of the array substrate, and the gate lines 01 arearranged horizontally. In each pixel unit 04, there is a group of pixelelectrodes A and B arranged vertically, and the length of each of thepixel electrodes A and B in a horizontal direction is larger than thelength thereof in a vertical direction.

In an array substrate according to some embodiments of the disclosure,every three pixel electrodes constitute a pixel unit having arectangular shape, in which two of the every three pixel electrodes arearranged substantially in the extension direction of the data lines 02,the remaining one of the every three pixel electrodes is arrangedsubstantially in the extension direction of the gate lines 01 withrespect to the two of the every three pixel electrodes arrangedsubstantially in the extension direction of the data lines 02.

For example, as shown in FIG. 1c , the pixel electrode A, the pixelelectrode B and the pixel electrode C constitute a pixel unit 04 havinga rectangular shape. Two pixel electrodes A and B are arrangedvertically substantially in the extension direction of the data lines02, and the length of each of the pixel electrodes A and B in ahorizontal direction is larger than the length thereof in a verticaldirection. The pixel electrode C is arranged on the right side of thepixel electrode A and the pixel electrode B and is arranged vertically,and the length of the pixel electrode C in a vertical direction is equalto the sum of the lengths of the pixel electrode A and the pixelelectrode B in a vertical direction. That is, between two adjacent gatelines 01, there is a pixel unit 04 having a rectangular shape andincluding three pixel electrodes arranged in a delta type shape, and aplurality of pixel units 04 are arranged periodically on the basesubstrate in an array.

In an array substrate according to some other embodiments of the presentdisclosure, every four pixel electrodes constitute a pixel unit having arectangular shape, in which two groups of pixel electrodes are arrangedsubstantially in the extension direction of the gate lines 01, with eachgroup consisting of two pixel electrodes arranged substantially in theextension direction of the date lines 02.

For example, as shown in FIG. 1d , the pixel electrode A′, the pixelelectrode B′, the pixel electrode C′ and the pixel electrode D′constitute a pixel unit 05 having a rectangular shape. The pixelelectrodes A′ and B′ are arranged vertically and a horizontal lengththereof is larger than a vertical length thereof, and the pixelelectrodes C′ and D′ are arranged vertically and a horizontal lengththereof is larger than a vertical length thereof. That is, between twoadjacent gate lines 01, there is a pixel unit 05 having a rectangularshape and including four pixel electrodes arranged in a field typeshape, and a plurality of pixel units 05 are arranged periodically onthe base substrate in an array.

In specific implementations, in order to avoid light leakage around thegate lines 01 and the data lines 02, as shown in FIG. 1c or FIG. 1d ,the array substrate may further include a black matrix layer 06 over thegate lines 01 and the data lines 02, and a width of a pattern of theblack matrix layer 06 over each data line 02 and covering the data line02 is larger than the width of the data line 02.

Specifically, because there is a shielding electrode 03 over the gateline 01, the width of the black matrix layer 06 over the gate line 01can be set to be equal to the width of the gate line 01. A width of theblack matrix layer 06 over the data line 02 within each pixel unit canbe calculated by the following method.

Taking the structure shown in FIG. 1c as an example and referring to thestructural schematic view shown in FIG. 3 showing that the black matrixlayer 06 covers the data lines 02, it can be known that the width M ofthe black matrix layer 06 corresponding to three data lines 02 includedin one pixel unit 04 is constituted by two halves of EE′ and one FF′,namely,M=c/2+a+b+b+a+b+b+a+c/2=3a+4b+c,

where, ‘a’ refers to a width of the data line 02, ‘b’ refers to atolerance, and ‘c’ refers to a space between two data lines 02, whichtypically is set as 6.5 um.

In contrast, in the prior art, a width N of the black matrix layercovering data lines is constituted by three FF′, namely,N=a/2+b+b+a+b+b+a+b+b+a/2=3a+6b,

where, ‘a’ refers to a width of the data line, and ‘b’ refers to atolerance.

Since c/2<<b, the width of the black matrix layer in each pixel unit ofthe array substrate according to embodiments of the present disclosureis much less than the width of the black matrix layer in each pixel unitof the array substrate in the prior art. Thus, the pixel aperture ratioof the array substrate according to embodiments of the presentdisclosure is increased.

Based on the same inventive concept, embodiments of the presentdisclosure also provide a liquid crystal display (LCD) panel includingthe array substrate according to the above embodiments of the presentdisclosure, an opposing substrate opposite to the array substrate, and ablack matrix layer provided on a side of the opposing substrate facingthe array substrate or on a side of the array substrate facing theopposing substrate, wherein a width of a pattern of the black matrixlayer over the data line and covering the date line is greater than awidth of the data line.

Embodiments of the present disclosure also provide a display apparatus,including the liquid crystal display (LCD) panel according to the aboveembodiments of the present disclosure. The display apparatus may be amobile phone, a panel computer, a TV set, a monitor, a laptop computer,a digital photo frame, a navigator and other products or componentshaving a display function. For the implementation of the displayapparatus, it can refer to embodiments of the liquid crystal display(LCD) panel, and redundant description will be omitted.

With the array substrate, the liquid crystal display (LCD) panel and thedisplay apparatus according to embodiments of the present application,the array substrate includes a plurality of gate lines and a pluralityof data lines crossing each other, a plurality of pixel electrodesdisposed within areas defined by the plurality of gate lines and theplurality of data lines, and shielding electrodes provided over the gatelines, wherein the shielding electrodes cover at least edge portions ofthe gate lines close to the pixel electrodes; at least every three pixelelectrodes constitute a pixel unit, and at least one pixel electrode ineach pixel unit has a length substantially in an extension direction ofthe gate lines larger than a length thereof substantially in anextension direction of the data lines; the respective pixel electrodesconstitute the same pixel unit are connected with different data linescorrespondingly; and there are two data lines in a gap between every twoadjacent pixel units. Therefore, the area of the black matrix in eachpixel unit for covering the data lines is greatly reduced and theaperture ratio is increased without reducing the number of the gatelines and the data lines by improving the structure of the data lines byproviding two data lines in a gap between every two adjacent pixelunits. Further, the area of the black matrix for covering the gate linesis reduced by using the gate line shielding. The two factors functiontogether to greatly increase the aperture ratio of the display panel andthus greatly improve picture quality of the LCD panel.

Although several exemplary embodiments have been shown and described, itwould be appreciated by those skilled in the art that various changes ormodifications may be made in these embodiments without departing fromthe principles and spirit of the disclosure. If these modifications andchanges are covered by the claims and their equivalents defined in theclaims, they are also included in the present disclosure.

What is claimed is:
 1. An array substrate comprising: a plurality ofgate lines and a plurality of data lines arranged to cross each other; aplurality of pixel electrodes disposed within areas defined by theplurality of gate lines and the plurality of data lines; and shieldingelectrodes disposed above the gate lines, wherein the shieldingelectrodes cover at least edge portions of the gate lines close to thepixel electrodes, respectively, wherein at least every three of theplurality of pixel electrodes constitute a pixel unit, and at least oneof the plurality of pixel electrodes in each pixel unit has a length inan extension direction of the gate lines larger than a length in anextension direction of the data lines, wherein the respective ones ofthe plurality of pixel electrodes constituting a same pixel unit areconnected with different data lines correspondingly, and wherein two ofthe plurality of data lines are provided in a gap between every twoadjacent pixel units.
 2. The array substrate according to claim 1,further comprising a black matrix layer disposed over the data lines andthe gate lines, wherein a width of a pattern of the black matrix layerover each data line and covering the data line is greater than a widthof the data line.
 3. The array substrate according to claim 1, whereinthe shielding electrodes only cover the edge portions of the gate lines,respectively.
 4. The array substrate according to claim 3, wherein theshielding electrodes and the pixel electrodes are disposed in a samelayer and are insulated from each other.
 5. The array substrateaccording to claim 1, wherein the shielding electrodes completely coverthe gate lines, respectively.
 6. The array substrate according to claim5, wherein the shielding electrodes and the pixel electrodes aredisposed in a same layer and are insulated from each other.
 7. The arraysubstrate according to claim 1, wherein in each pixel unit, there is atleast one group of the plurality of pixel electrodes consisting of twopixel electrodes arranged in the extension direction of the data lines.8. The array substrate according to claim 7, wherein each of the twopixel electrodes arranged in the extension direction of the data lineshas a length in the extension direction of the gate lines larger than alength in the extension direction of the data lines.
 9. The arraysubstrate according to claim 8, wherein every three of the plurality ofpixel electrodes constitute a pixel unit having a rectangular shape, inwhich two of the every three pixel electrodes are arranged in theextension direction of the data lines, while the remaining one of theevery three pixel electrodes and the two of the every three pixelelectrodes are arranged in the extension direction of the gate lines.10. The array substrate according to claim 8, wherein every four of theplurality of pixel electrodes constitute a pixel unit having arectangular shape, in which two groups of pixel electrodes are arrangedsubstantially in the extension direction of the gate lines, with eachgroup consisting of two pixel electrodes arranged substantially in theextension direction of the date lines.
 11. A liquid crystal displaypanel comprising: the array substrate according to claim 1; an opposingsubstrate opposite to the array substrate; and a black matrix layerprovided on a side of the opposing substrate facing the array substrateor on a side of the array substrate facing the opposing substrate;wherein a width of a pattern of the black matrix layer over each dataline and covering the data line is greater than a width of the dataline.
 12. A display apparatus, comprising the liquid crystal displaypanel according to claim
 11. 13. The liquid crystal display panelaccording to claim 11, wherein, in the array substrate, the shieldingelectrodes only cover the edge portions of the gate lines, respectively.14. The liquid crystal display panel according to claim 13, wherein, inthe array substrate, the shielding electrodes and the pixel electrodesare disposed in a same layer and are insulated from each other.
 15. Theliquid crystal display panel according to claim 11, wherein, in thearray substrate, the shielding electrodes completely cover the gatelines, respectively.
 16. The liquid crystal display panel according toclaim 15, wherein, in the array substrate, the shielding electrodes andthe pixel electrodes are disposed in a same layer and are insulated fromeach other.
 17. The liquid crystal display panel according to claim 11,wherein, in each pixel unit in the array substrate, there is at leastone group of pixel electrodes consisting of two pixel electrodesarranged in the extension direction of the data lines.
 18. The liquidcrystal display panel according to claim 17, wherein, in the arraysubstrate, each of the two pixel electrodes arranged in the extensiondirection of the data lines has a length in the extension direction ofthe gate lines larger than a length in the extension direction of thedata lines.
 19. The liquid crystal display panel according to claim 18,wherein, in the array substrate, every three of the plurality of pixelelectrodes constitute a pixel unit having a rectangular shape, in whichtwo of the every three of the plurality of pixel electrodes are arrangedin the extension direction of the data lines, while the remaining one ofthe every three of the plurality of pixel electrodes and the two of theevery three of the plurality of pixel electrodes are arranged in theextension direction of the gate lines.
 20. The liquid crystal displaypanel according to claim 18, wherein, in the array substrate, every fourof the plurality of pixel electrodes constitute a pixel unit having arectangular shape, in which two groups of pixel electrodes are arrangedsubstantially in the extension direction of the gate lines, with eachgroup consisting of two pixel electrodes arranged substantially in theextension direction of the date lines.